Energy Efficiency of Full Pipelining: A Case Study for Matrix Multiplication


Customized pipeline designs that minimize the pipeline initiation interval (II) maximize the throughput of FPGA accelerators designed with high-level synthesis (HLS). What is the impact of minimizing II on energy efficiency? Using a matrix-multiply accelerator, we show that matrix multiplies with II>1 can sometimes reduce dynamic energy below II=1 due to interconnect savings, but II=1 always achieves energy close to the minimum. We also identify sources of inefficient mapping in the commercial tool flow.

24th IEEE International Symposium on Field-Programmable Custom Computing Machines (IEEE FCCM 16), acceptance rate: 32/133 = 24%
Peipei Zhou
Peipei Zhou
Assistant Professor of ECE Department

My research interests include Customized Computer Architecture and Programming Abstraction for Health & AI Applications